1. Field of the Invention
The present invention relates to a non-volatile semiconductor storage device and a method for manufacturing the device.
2. Related Art
As for the non-volatile semiconductor storage device for which electrical writing and erasing can be conducted and which can retain information even if power supply is cut off, it is being developed as a storage medium used in portable information devices, aiming at low voltage driving and a larger capacity. As the non-volatile semiconductor storage device that is the main stream at the present time, there is the flash memory which retains information by storing electric charge in a floating electrode formed of polysilicon.
The flash memory includes, for example, a p-type silicon substrate, a tunnel insulating film formed on the silicon substrate, a floating electrode formed of polysilicon on the tunnel insulating film, a control insulating film formed on the floating electrode, a control electrode formed of polysilicon on the control insulating film, a channel region located in the silicon substrate right under the tunnel insulating film, and a source region formed of n+-type silicon and a drain region formed of n+-type silicon disposed in the silicon substrate so as to be opposed to each other with the channel region between. This structure can be regarded as a structure obtained from an n-channel field effect transistor having a source region and a drain region in a silicon substrate and a control electrode as three terminals by replacing a gate insulating film under the control electrode with a multilayer structure of a control insulating film, a floating electrode and a tunnel insulating film. Since the floating electrode is electrically insulated from the silicon substrate and the control electrode by the tunnel insulating film and the control insulating film, it becomes possible for the floating electrode to store the electric charge.
Writing into the memory is implemented by applying a positive voltage between the silicon substrate and the control electrode and thereby injecting electrons from the channel region into the floating electrode by means of the tunnel effect in quantum mechanics. On the other hand, erasing from the memory is implemented by applying a negative voltage between the silicon substrate and the control electrode and thereby emitting electrons from the floating electrode into the channel region by means of the tunnel effect in quantum mechanics. In readout from this memory, it is determined whether information is “0” or “1” by detecting a difference caused in a current flowing from the source region to the drain region between a state in which electrons are injected into the floating electrode (writing is performed) and the floating electrode is charged to negative and a state in which electrons are not injected (after erasing has been performed), when voltages are applied respectively between the source region and the drain region and between the source electrode and the control electrode.
For lowering the error rate at the time of readout, it is desirable that the number of electrons in the floating electrode greatly differs between after writing and after erasing (in other words, the number of electrons is as large as possible and the number of electrons is as small as possible). However, there is a problem that the number of electrons in the floating electrode after writing is limited by a phenomenon that electrons injected from the channel region into the floating electrode at the time of writing are passed through the control insulating film by the tunnel effect and emitted to the control electrode.
For solving this problem, a technique of increasing the voltage (write voltage) applied to the control electrode at the time of writing, or a technique of increasing the thickness of the control insulating film is also conceivable. If the former cited technique is used, power dissipation in memory operation increases. If the latter cited technique is used, it becomes difficult to make the memory cell finer (increase the capacity of the memory).
As a different technique of increasing the number of electrons in the floating electrode after writing and improving the write characteristics, a technique of applying extension strain to the floating electrode has been proposed in recent years (for example, see JP-A 2005-79559 (KOKAI), and R. Arghavani, V. Banthia, M. Balseanu, N. Ingle, N. Derhacobian, and S. E. Thompson, “Strain Engineering in Non-Volatile Memories,” Semiconductor International, vol. 4 (2006)). If extension strain is applied to the floating electrode formed of polysilicon, conduction band bottom energy of polysilicon falls. According to calculation results of dependence of the conduction band bottom energy of silicon upon the extension strain quantity (see, for example, K. Uchida, T. Krishnamohan, K. C. Saraswat, and Y. Nishi, “Physical Mechanisms of Electron Mobility Enhancement in Uniaxial Stressed MOSFETs and Impact of Uniaxial Stress Engineering in Ballistic Regime,” Technical Digest of International Electron Devices Meeting, pp. 135-138 (2005)), the conduction band bottom energy of silicon falls by approximately 0.025 eV when the extension strain quantity is 0.2%.
If the conduction band bottom energy of the floating electrode formed of polysilicon falls (i.e., the work function increases), the bottom energy difference of the conduction band (tunnel barrier height) between the control insulating film and the floating electrode also increases. Therefore, the phenomenon that electrons are passed through the control insulating film from the floating electrode and emitted to the control electrode is suppressed, and the write characteristics are improved. By using this technique, it is prevented that the power dissipation increases and making the memory cell finer becomes difficult.
If this technique is used, the erase characteristics are conversely deteriorated. Because since the conduction band bottom energy difference (tunnel barrier height) between the floating electrode and the tunnel insulating film also increases as a result of an increase of the work function of polysilicon caused by extension strain, the number of electrons passed through the tunnel insulating film from the floating electrode and emitted to the channel region at the time of erase decreases. If the number of electrons in the floating electrode after erasing is also increased due to degradation of erase characteristics even if the number of electrons in the floating electrode after writing is increased due to improvement of the write characteristics, the difference in threshold voltage difference of a transistor between after writing and after erasing does not change so greatly and eventually the error rate at the time of memory readout is not improved.
In the conventional flash memory, means for improving the write characteristics without degrading the erase characteristics has not been implemented as described above.